TPT Vanguard

An open-source, Rust real-time operating system — a license-free alternative to VxWorks and QNX.

Nuclear plants, avionics, industrial robots, and grid infrastructure run on proprietary, per-seat-licensed real-time operating systems. TPT Vanguard is a microkernel written in Rust that provides the same class of guarantee — preemptive, bounded-latency scheduling, hardware-enforced task isolation, and QNX-style message-passing IPC — without a license fee or vendor lock-in.

Status: Pre-Alpha / Phase 0 (project foundation). No kernel code yet — see todo.md for the phased build-out and spec.txt for the full design document. This is a standalone project, not tied to any single downstream consumer.

Mission

Provide a preemptive, deterministic, hardware-protected real-time kernel that anyone can audit, build on, and deploy without commercial RTOS licensing — usable on its own, and eventually as a real backend for projects (such as the sibling tpt-dynamo DCS) that currently target VxWorks/QNX as a licensed, unimplemented placeholder.

Architecture Overview

TPT Vanguard is a Cargo workspace of small, focused, no_std crates. The kernel core stays arch-agnostic; a single AddressSpace trait is the boundary that lets memory protection be implemented once for the ARMv7-M MPU (Cortex-M, v1, no MMU) and again for the ARMv8-A MMU (Cortex-A, phase 2) without changing the scheduler, IPC, or syscall layers above it.

Crate	Responsibility
`kernel-core`	Scheduler, task/TCB management, IPC, `AddressSpace` trait, syscall dispatch. `no_std`, `alloc`-free.
`arch-cortex-m`	Cortex-M MPU backend: context switch (`PendSV`/`SysTick`), boot entry, `MpuAddressSpace`.
`arch-cortex-a`	(phase 2) Cortex-A MMU backend: EL1 vectors, GIC, `MmuAddressSpace`.
`syscall-abi`	Shared syscall IDs, argument marshaling, error codes — the kernel/userspace contract.
`libc-lite`	Minimal POSIX-ish userspace shim (threads, mutexes, condvars, message queues) over `syscall-abi`.
`bsp-qemu-lm3s6965`	Reference board support for QEMU's Cortex-M `lm3s6965evb`, used for CI boot/integration tests.
`xtask`	Build + QEMU-launch automation (`cargo xtask qemu`).

        preemption / IPC wake            syscalls (svc)
              ┌──────────────┐         ┌──────────────────┐
 task ───────▶│ kernel-core  │◀───────▶│    libc-lite      │◀── userspace tasks
              │ (scheduler,  │         │ (pthread-ish API) │
              │  IPC, TCBs)  │         └──────────────────┘
              └──────┬───────┘
                     │ AddressSpace trait
              ┌──────▼───────┐
              │ arch-cortex-m│  (MPU regions)   ── or ──   arch-cortex-a (MMU, phase 2)
              └──────────────┘

Scope (v1: "core kernel + POSIX-ish syscall layer")

In scope: preemptive fixed-priority scheduler, tasks, MPU-based memory protection, QNX-style synchronous IPC, mandatory priority-inheritance mutexes, watchdog integration, boot/init, and a minimal POSIX-ish syscall surface (threads, mutexes, condvars, message queues).

Explicitly out of scope for v1: filesystem, network stack, full driver/BSP framework, fork/exec, full POSIX signal semantics, and any functional-safety certification claim.

License

TPT Vanguard is dual-licensed under either of:

at your option. See docs/LEGAL_NOTES.md for the project's trademark/proprietary-source boundaries with respect to VxWorks and QNX.

Contribution Status

Contributions are welcome. Because this is a kernel, a narrow "kernel-critical" surface (scheduler, memory protection, syscall ABI, IPC) carries a stricter review bar than the rest of the project — see CONTRIBUTING.md and docs/GOVERNANCE.md.

Roadmap

The full phased roadmap lives in todo.md:

Phase 0 — Foundation & Licensing 🔧 in progress
Phase 1 — Boot & Minimal Runtime (M0: QEMU Cortex-M) ⬜
Phase 2 — Preemptive Scheduler & Tasks (M1) ⬜
Phase 3 — Memory Protection (M2: MPU) ⬜
Phase 4 — IPC / Rendezvous Message Passing (M3) ⬜
Phase 5 — Watchdog & Fault/Init Model ⬜
Phase 6 — POSIX-ish Syscall Layer (M4) ⬜
Phase 7 — v1 Hardening & Docs ⬜
Phase 8 — Cortex-A / MMU Port (M5) ⬜
Phase 9 — Future / Deferred ⬜

Building

cargo build --workspace
cargo test  --workspace
cargo clippy --workspace --all-targets
cargo fmt   --all

(Bare-metal arch/board crates require the relevant target, e.g. rustup target add thumbv7em-none-eabihf, and qemu-system-arm for integration tests — see crates/xtask.)

Disclaimer

This software is provided "AS IS" without warranty of any kind. It is pre-alpha research software, is not certified to any functional-safety or real-time standard, and must not be used to control real safety-critical equipment.

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